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[Embeded-SCM Develop] ref-ddr-sdram-verilog.zip

Description: sdram的verilog的源码实现
Platform: | Size: 903683 | Author: | Hits:

[Other resource] ref-sdr-sdram-verilog

Description: 本代码是用VRILOG语言写的SDRAM的控制器的标准代码,供开发SARM参考.-this code is used to write the language VRILOG SDRAM controller standard code for the development of SARM reference.
Platform: | Size: 776597 | Author: 汪旭 | Hits:

[Other resource] very-good-ok-ref-ddr-sdram-verilog

Description: Sdr SDRAM控制器参考设计,很好的-Sdr SDRAM controller reference design, very good
Platform: | Size: 895594 | Author: 姚明 | Hits:

[Other resource] ref-sdr-sdram-verilog

Description: sdram的控制器 verilog源码
Platform: | Size: 719050 | Author: 唐业衡 | Hits:

[Other] ref-sdr-sdram-verilog

Description: sdram控制器的开发程序，还有文档，可以参考以下
Platform: | Size: 776866 | Author: 王鹏 | Hits:

[VHDL-FPGA-Verilog] DDR（双速率）SDRAM控制器参考设计verilog代码

Description: DDR SDRAM reference design documentation
Platform: | Size: 895281 | Author: tony_gx@hotmail.com | Hits:

[VHDL-FPGA-Verilog] Verilog&Vhdl混语言对SDRAM的控制源代码

Description: Verilog&Vhdl混语言对SDRAM的控制源代码，提供了很好的例子，顶层文件为sdrm.v！-VerilogVhdl mixed language SDRAM control of the source code, provided a good example of top-level documents sdrm.v!
Platform: | Size: 249856 | Author: 飞扬 | Hits:

[VHDL-FPGA-Verilog] sdram

Description: sdram控制器 这里考虑将SDRAM控制器结合目前项目开展来做相应的模块，而不做SDRAM通用控制器，这样也是考虑了FPGA的器件资源而采取的措施。同时编写的逻辑简单，没有多余的逻辑资源有利于提高控制器的速度，满足最后的设计要求。-SDRAM controller here consider SDRAM controller current projects do the corresponding module, but not so common SDRAM controller, as well as consider the FPGA device resources and the measures taken. While the preparation of simple logic, the logic is no spare resources to improve the speed controller to meet the final design requirements.
Platform: | Size: 3072 | Author: 林博 | Hits:

[VHDL-FPGA-Verilog] sdram_control_burst

Description: 精简的sdram读写控制器例子，适用于数据采集系统，verilog，只支持burst方式的读写-streamlined read and write SDRAM controller example, applied to the data acquisition system, Verilog. only supports burst mode read and write
Platform: | Size: 153600 | Author: 梁文锋 | Hits:

[Parallel Port] mt48lc2m32b2

Description: the verilog model of sdram-mt48lc2m32b2 device.-the verilog model of sdram- mt48lc2m32b2 d evice.
Platform: | Size: 6144 | Author: nightyboy | Hits:

[VHDL-FPGA-Verilog] sdr_c_trl_verilog

Description: SDRAM 控制器的Verilog代码 经过综合验证过的.无截压密码-SDRAM controller Verilog code comprehensive test after all. No cut-off pressure Password
Platform: | Size: 12288 | Author: 曹大壮 | Hits:

[VHDL-FPGA-Verilog] sdram_verilog

Description: 这是使用VERILOG语言，基于MICRON公司的SDRAM开发的SDRAM接口逻辑-verilog This is the use of language, MICRON-based company's development of the SDRAM SDRAM interface logic
Platform: | Size: 414720 | Author: | Hits:

[VHDL-FPGA-Verilog] AlteraSDR-SDRAM

Description: Altera 官方提供的SDRAM控制器,verilog的-SDRAM controller provided by Altera in Verilog HDL
Platform: | Size: 811008 | Author: machenghai | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: verilog 128位 突发4. sdr fpga控制器-verilog 128 bit unexpected 4. sdr fpga controller
Platform: | Size: 119808 | Author: pudnrtest | Hits:

[VHDL-FPGA-Verilog] ddrsdram_verilog

Description: 内附doc是DDR SDRAM 参考设计文档；model包含SDRAM Verilog的模型；simulation包含verilog测试平台、modelsim工程文、设计库函数；source包含verilog源文件；synthesis包含工程的综合文件 。-Enclosing the doc is a DDR SDRAM reference design documentation model contains SDRAM Verilog model simulation with verilog test platform, modelsim project text, design library function source contains the verilog source files synthesis comprehensive document that contains the project.
Platform: | Size: 751616 | Author: 陈少华 | Hits:

[VHDL-FPGA-Verilog] sdram-control-verilog

Description: SDRAM控制器源码，内含完整的控制器verilog源代码和测试代码，超值哈。-This readme file for the SDR SDRAM Controller includes information that was not incorporated into the SDR SDRAM Controller White Paper v1.1.
Platform: | Size: 991232 | Author: runxin | Hits:

[VHDL-FPGA-Verilog] ref-sdr-sdram-verilog

Description: SDRAM控制器，使用verilog编写-SDRAM controller, use the write verilog
Platform: | Size: 776192 | Author: yangbo | Hits:

[VHDL-FPGA-Verilog] ref-sdr-sdram-verilog

Description: sdram的verilog 建模参考设计，希望有所帮助-sdram and verilog implent
Platform: | Size: 886784 | Author: pengyong | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: SDRAM控制器，Verilog代码编写，让你快速了解SDRAM的读写时序。包含Modelsim仿真工程和学习笔记-SDRAM controller, Verilog coding, allows you to quickly understand the SDRAM read and write timing. Modelsim simulation engineering and contains study notes
Platform: | Size: 3031040 | Author: jianzi | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: FPGA SDRAM控制器Verilog源码，通过测试-FPGA SDRAM VERILOG
Platform: | Size: 5120 | Author: 大海 | Hits:
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